Semiconductor memory devices may generally be classified as volatile or nonvolatile memory, depending on whether the device is able to retain stored data in the absence of applied power. Among the various types of nonvolatile memory, so-called flash memory has gained increasing popularity with the advent of mobile electronic systems such as laptops, tablet computers and smart phones. Flash memory is a term used to describe a class of electrically erasable and programmable nonvolatile memory devices based on the use of floating gate transistors wherein data is written or “programmed” to the device by trapping electrons in the floating gate using Fowler-Nordheim tunneling, known from EEPROM technology, or hot electron injection, known from EPROM technology. A plurality of different types of flash memory is known and categorized according to the architecture of their arrays of floating gate transistors. The most popular among these are the so-called NOR flash and NAND flash devices.
In NOR flash, each memory cell, i.e. floating gate transistor, has one end connected directly to ground, and the other end connected directly to a bit line. The low read latencies characteristic of NOR devices allow for both direct code execution and data storage in a single memory product. In NAND flash, several transistors are connected in series with a common connection to ground. As a result, data must be read on a block-wise basis, with typical block sizes of hundreds to thousands of bits. On the plus side, NAND flash comes with reduced erase and write times, and requires less chip area per cell, thus allowing greater storage density and lower cost per bit than NOR flash. Both architectures have in common that an erase operation can be performed only on a block-wise basis, generally by setting all bits in the block to a bit value of ‘1’, i.e. an erase state. Due to the nonvolatile nature of the memory, rewriting to an already programmed block is furthermore only possible in limited situations, namely when the new data's ‘0’ bits are a superset of the over-written data's ‘0’ bits, wherein a bit value of ‘0’ represents a program state P. By way of example, 1010 may be rewritten into 0010, while it cannot be rewritten into 1110 without first erasing the entire block. In any case, a fully programmed block, i.e. having all bits in a program state, e. g. 0000 in the above example, cannot be re-programmed without being first erased.
As a consequence, over-writing existing data on a flash memory device often involves writing the new data to an empty, i.e. erased block, and erasing the old data in the original block, accompanied by an adaptation of a corresponding memory map between the logical page addresses (LPAs) and the physical page addresses (PPAs) of the memory blocks. This so-called copy-over and erase algorithm is generally automatically performed by a controller of the flash memory device or the external host. Due to the rather long duration of an erase operation, which may last from approximately 1 ms up to 1000 ms for a typical memory block, depending on the type of flash memory and the number of program/erase cycles, that the block has already encountered, the erase request for the over-written blocks is typically scheduled for execution at a later time. Consequently, users may occasionally disconnect a flash memory device, such as a memory stick or external solid state drive, from its power supply or power down the flash memory device before all scheduled erase operations have been completed, with unpredictable results for the status of the memory cells in partially erased blocks. An attempt to read data from such partially erased blocks will then likely return random, unstable or similar but not identical data with potentially catastrophic consequences for the application relying on the data.
For the above reasons, a fail-safe erase mechanism for flash memory devices is needed. The present disclosure provides such a fail-safe erase mechanism and a corresponding memory device which allows to safely erase data without having to modify the host software for accessing data on the device.